Subthreshold behavior of junctionless silicon nanowire transistors from atomic scale simulations

Lida Ansari, Baruch Feldman, Giorgos Fagas, Jean Pierre Colinge, James C. Greer

Research output: Journal PublicationArticlepeer-review

23 Citations (Scopus)


Previously, we reported current-voltage characteristics of silicon nanowire junctionless transistors with a 3 nm gate length and a 1 nm wire diameter as calculated within a Density Functional Theory (DFT) framework. Our results reveal that a 3 nm gate length can provide good electrostatic control over the channel. In this work, sensitivity to dopant position within the nanowire cross section on the band structure is explored. Our calculation of the current-voltage characteristics is extended here by considering the role of charge self-consistency on the charge carrier transport, and in particular the subthreshold slope in these nanowire transistors is examined. Even at such small length scales, the self-consistent calculations indicate that subthreshold slopes of 74 and 80 mV/dec can be obtained for p-channel and n-channel devices, respectively.

Original languageEnglish
Pages (from-to)58-62
Number of pages5
JournalSolid-State Electronics
Publication statusPublished - May 2012
Externally publishedYes


  • Ab initio calculations
  • Electronic transport
  • Elemental semiconductors
  • NEGF
  • Nanowire
  • Silicon
  • Transistors

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry


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