TY - GEN
T1 - Traffic-Balanced IP Mapping Algorithm for 2D-mesh on-chip-networks
AU - Lin, Ting Jung
AU - Lin, Shu Yen
AU - Wu, An Yeu
PY - 2008
Y1 - 2008
N2 - Intellectual Properties (IPs) mapping algorithms for On-Chip-Networks (OCNs) allocate a set of IPs onto given network topologies. The existing mapping algorithms limit a single IP to connect to a single router. Hence, the IPs with large communication volumes will result in heavy traffic loads of certain routers. Those routers may become hot spots due to high power density, which affects the reliability of chips. In this paper, new Network Interfaces (NIs) were proposed to solve the aforementioned problem. Traffic-Balanced Mapping Algorithm (TBMAP) is also proposed based on the new NIs. The traffic loads then become more decentralized, and the traffic of all the routers on the chip can be balanced without sacrificing the networking performance. The TBMAP has short runtime to achieve balanced network traffic loads, which leads to the enhanced performance of OCNs. The experimental results show that at least 24% communication time is saved for real applications.
AB - Intellectual Properties (IPs) mapping algorithms for On-Chip-Networks (OCNs) allocate a set of IPs onto given network topologies. The existing mapping algorithms limit a single IP to connect to a single router. Hence, the IPs with large communication volumes will result in heavy traffic loads of certain routers. Those routers may become hot spots due to high power density, which affects the reliability of chips. In this paper, new Network Interfaces (NIs) were proposed to solve the aforementioned problem. Traffic-Balanced Mapping Algorithm (TBMAP) is also proposed based on the new NIs. The traffic loads then become more decentralized, and the traffic of all the routers on the chip can be balanced without sacrificing the networking performance. The TBMAP has short runtime to achieve balanced network traffic loads, which leads to the enhanced performance of OCNs. The experimental results show that at least 24% communication time is saved for real applications.
KW - Interconnection networks
KW - Network interfaces
UR - http://www.scopus.com/inward/record.url?scp=57849138954&partnerID=8YFLogxK
U2 - 10.1109/SIPS.2008.4671762
DO - 10.1109/SIPS.2008.4671762
M3 - Conference contribution
AN - SCOPUS:57849138954
SN - 9781424429240
T3 - IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
SP - 200
EP - 203
BT - 2008 IEEE Workshop on Signal Processing Systems, SiPS 2008, Proceedings
T2 - 2008 IEEE Workshop on Signal Processing Systems, SiPS 2008
Y2 - 8 October 2008 through 10 October 2008
ER -