Reduced complexity DVB-RCS turbo decoder

Turbo codes are employed in many robust wireless digital communication systems. Those codes have been adopted for the satellite return channel in DVB-RCS standards. The implementation for such codes is complex and dissipates a large amount of power. For decoder hardware implementation, reduced complexity leads to low power consumption which is considered a key implementation issue. This paper investigates the decoder input quantization of low complexity decoding algorithm and proposes an algorithm for efficient decoder quantization to achieve significant improvement in the hardware implementation of the decoder architecture. Hence, leading to reduction of both area and power consumption in the whole radio receiver.