TY - GEN
T1 - Dual-Active-Bridge Converter Modeling for Real-Time Signal Processor Implementation
AU - Sun, Jiaqin
AU - Buticchi, Giampaolo
AU - Li, Jing
AU - Zhang, He
AU - Guenter, Sandro
AU - Yang, Jiajun
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - This study evaluates the full-linear transfer function model for the dual-active-bridge with the impedance-based small-signal averaged model. Besides, for the better implementation on the FPGA, a discrete-time state-space model has been developed. The model matching comparison of non-linear, full-linear, switching and state-space models has been done. In this paper, each mode of single and cascade connection of dual active bridge have been evaluated and compared.
AB - This study evaluates the full-linear transfer function model for the dual-active-bridge with the impedance-based small-signal averaged model. Besides, for the better implementation on the FPGA, a discrete-time state-space model has been developed. The model matching comparison of non-linear, full-linear, switching and state-space models has been done. In this paper, each mode of single and cascade connection of dual active bridge have been evaluated and compared.
KW - dual active bridge converter
KW - phase shift modulation
KW - state-space
KW - transfer function
UR - http://www.scopus.com/inward/record.url?scp=85143913093&partnerID=8YFLogxK
U2 - 10.1109/IECON49645.2022.9969008
DO - 10.1109/IECON49645.2022.9969008
M3 - Conference contribution
AN - SCOPUS:85143913093
T3 - IECON Proceedings (Industrial Electronics Conference)
BT - IECON 2022 - 48th Annual Conference of the IEEE Industrial Electronics Society
PB - IEEE Computer Society
T2 - 48th Annual Conference of the IEEE Industrial Electronics Society, IECON 2022
Y2 - 17 October 2022 through 20 October 2022
ER -