FPGA implementation of a reconfigurable Viterbi decoder for WiMAX receiver

Sherif Welsen Shaker, Salwa Hussien Elramly, Khaled Ali Shehata

Research output: Chapter in Book/Conference proceedingConference contributionpeer-review

15 Citations (Scopus)

Abstract

Field Programmable Gate Array technology (FPGA) is a highly configurable option for implementing many sophisticated signal processing tasks in Software Defined Radios (SDRs). Those types of radios are realized using highly configurable hardware platforms. Convolutional codes are used in every robust digital communication system and Viterbi algorithm is employed in wireless communications to decode the convolutional codes. Such decoders are complex and dissipate large amount of power. In this paper, a low power-reconfigurable Viterbi decoder for WiMAX receiver is described using a VHDL code for FPGA implementation. The proposed design is implemented on Xilinx Virtex-II Pro, XC2vpx30 FPGA using the FPGA Advantage Pro package provided by Mentor Graphics and ISE 10.1 by Xilinx.

Original languageEnglish
Title of host publication21st International Conference on Microelectronics, ICM 2009
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages264-267
Number of pages4
ISBN (Print)9781424458165
DOIs
Publication statusPublished - 2009
Externally publishedYes
Event21th International Conference on Microelectronics, ICM 2009 - Marrakech, Morocco
Duration: 19 Dec 200922 Dec 2009

Publication series

NameProceedings of the International Conference on Microelectronics, ICM

Conference

Conference21th International Conference on Microelectronics, ICM 2009
Country/TerritoryMorocco
CityMarrakech
Period19/12/0922/12/09

Keywords

  • FPGA
  • VHDL
  • Viterbi decoder
  • WiMAX

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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