Communication-aware application mapping and scheduling for NoC-based MPSoCs

Heng Yu, Yajun Ha, Bharadwaj Veeravalli

Research output: Chapter in Book/Conference proceedingConference contributionpeer-review

20 Citations (Scopus)

Abstract

Combined computation and communication workload mapping and scheduling pose a major challenge in embedded NoC-based MPSoC design. While contemporary researches largely focus on data locality-centric mapping methodologies, unawareness of transmission route and timing may negatively impact the mapping efficiency. In this paper, we develop a unified communication-aware NoC-based MPSoC mapping and scheduling algorithm, in which a list-scheduling method is used to map prioritized tasks to the best fit processor, based on a transmission route-aware cost function. Our algorithm is able to realize precise and predictable packet routing in the process of task mapping, and achieve shorter end-to-end application execution time. To evaluate our algorithm, we conduct experiments using three real applications on a simulated NoC-based MPSoC platform. Comparison results show that our algorithm can achieve greatly improved overall end-to-end time, and about 38.3% less transmission time on a 3 x 3 mesh structure.

Original languageEnglish
Title of host publicationISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems
Subtitle of host publicationNano-Bio Circuit Fabrics and Systems
Pages3232-3235
Number of pages4
DOIs
Publication statusPublished - 2010
Externally publishedYes
Event2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010 - Paris, France
Duration: 30 May 20102 Jun 2010

Publication series

NameISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems

Conference

Conference2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010
Country/TerritoryFrance
CityParis
Period30/05/102/06/10

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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