A fine-grain dynamically reconfigurable architecture aimed at reducing the FPGA-ASIC gaps

Ting Jung Lin, Wei Zhang, Niraj K. Jha

Research output: Journal PublicationArticlepeer-review

16 Citations (Scopus)

Fingerprint

Dive into the research topics of 'A fine-grain dynamically reconfigurable architecture aimed at reducing the FPGA-ASIC gaps'. Together they form a unique fingerprint.

Engineering & Materials Science