Minimization of network induced jitter impact on FPGA-based control systems for power electronics through forward error correction

Keyphrases

• Control System 100%
• Power Electronics 100%
• Jitter 100%
• Retransmission 100%
• FPGA-based Control 100%
• Forward Error Correction 100%
• Machine Drives 50%
• Distributed Control 50%
• Simulation Validation 50%
• Power Electronic Converters 50%
• System Dynamics 50%
• Network Routing 50%
• Error Correction Mechanism 50%
• Low Latency 50%
• Random Error 50%
• Distributed Architecture 50%
• Closed-loop Control System 50%
• Random Networks 50%
• Random Jitter 50%
• Distributed Power 50%
• Round-trip Delay 50%
• Predictable Latency 50%

Engineering

• Control System 100%
• Power Electronics 100%
• Transmissions 100%
• Field Programmable Gate Arrays 100%
• Forward Error-Correction 100%
• Distributed Control 50%
• Feedback Control System 50%
• Power Electronic Converter 50%
• Systems Dynamics 50%
• Random Error 50%
• Received Data 50%
• Roundtrip 50%
• Random Jitter 50%

Computer Science

• Forward Error Correction 100%
• Distributed Control 50%
• System Dynamics 50%
• Distributed Architecture 50%
• Utmost Importance 50%
• Random Network 50%
• Closed-Loop Control 50%