TY - GEN
T1 - Investigation on Software-based High-speed Envelope Demodulation Strategy for VR Resolvers Considering Circuit Impedance
AU - Xu, Li
AU - Li, Jing
AU - Gu, Chunyang
AU - Zhang, He
AU - Sun, Haiwen
AU - Du, Dalin
N1 - Publisher Copyright:
© 2025 IEEE.
PY - 2025
Y1 - 2025
N2 - Variable reluctance (VR) resolvers offer advantages in high-speed applications, but their operational range is limited by the increasing complexity of envelope demodulation at high rotational speeds. This paper proposes a software-based high-speed demodulation strategy, in which the induced voltage is modeled using the excitation coil's equivalent impedance to determine accurate sampling phases. A double-sampling technique is further introduced, fully exploiting all sampling instants within one excitation period that contain accurate position information, thereby increasing the rotor position update rate. Simulation validates the effectiveness of the induced voltage expression considering circuit impedance, and experimental results corroborate the feasibility of the proposed method, which suppresses angle errors at high speeds without modifying the conventional RDC system configuration.
AB - Variable reluctance (VR) resolvers offer advantages in high-speed applications, but their operational range is limited by the increasing complexity of envelope demodulation at high rotational speeds. This paper proposes a software-based high-speed demodulation strategy, in which the induced voltage is modeled using the excitation coil's equivalent impedance to determine accurate sampling phases. A double-sampling technique is further introduced, fully exploiting all sampling instants within one excitation period that contain accurate position information, thereby increasing the rotor position update rate. Simulation validates the effectiveness of the induced voltage expression considering circuit impedance, and experimental results corroborate the feasibility of the proposed method, which suppresses angle errors at high speeds without modifying the conventional RDC system configuration.
KW - double-sampling
KW - Envelope demodulation
KW - equivalent impedance model
KW - high-speed machine
KW - variable reluctance (VR) resolver
UR - https://www.scopus.com/pages/publications/105035896245
U2 - 10.1109/PEAS66638.2025.11403261
DO - 10.1109/PEAS66638.2025.11403261
M3 - Conference contribution
AN - SCOPUS:105035896245
T3 - IEEE PEAS 2025 - 2025 IEEE 3rd International Power Electronics and Application Symposium - Conference Proceedings
SP - 2079
EP - 2084
BT - IEEE PEAS 2025 - 2025 IEEE 3rd International Power Electronics and Application Symposium - Conference Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2025 IEEE 3rd International Power Electronics and Application Symposium, PEAS 2025
Y2 - 7 November 2025 through 10 November 2025
ER -