Hybrid CMOS-Memristive Convolutional computation for on-chip learning

Yang Zhang; Menglin Cui; Yang Liu; Linlin Shen

doi:10.1016/j.neucom.2019.04.031

Hybrid CMOS-Memristive Convolutional computation for on-chip learning

Yang Zhang
, Menglin Cui
, Yang Liu
, Linlin Shen^*

^*Corresponding author for this work

Research output: Journal Publication › Article › peer-review

14 Citations (Scopus)

Abstract

Nanoscale memristive devices have elicited widespread interests in implementing compact and energy-efficient neuromorphic computing systems. In this paper, a learning system of hybrid CMOS-memristive convolutional computation for on-chip learning is presented. Two different methods to achieve the convolutional computation on-chip are provided. One method is to utilize a one memristor (1M)-based array to realize both image convolution and recognition. Another method is to perform the convolutional computation on-chip through a hybrid CMOS-memristive learning circuits. In addition, a modified back propagation (BP) algorithm suitable for the proposed memristive neural networks is applied to perform image convolution and recognition. Another highlight of the proposed method is that the presented hybrid CMOS-memristive neural networks can be expanded to deep convolutional neural networks (DNN).

Original language	English
Pages (from-to)	48-56
Number of pages	9
Journal	Neurocomputing
Volume	355
DOIs	https://doi.org/10.1016/j.neucom.2019.04.031
Publication status	Published - 25 Aug 2019
Externally published	Yes

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Free Keywords

Convolutional neural networks
Crossbar array
Image recognition
Memristor

ASJC Scopus subject areas

Computer Science Applications
Cognitive Neuroscience
Artificial Intelligence

Access to Document

10.1016/j.neucom.2019.04.031

Cite this

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title = "Hybrid CMOS-Memristive Convolutional computation for on-chip learning",

abstract = "Nanoscale memristive devices have elicited widespread interests in implementing compact and energy-efficient neuromorphic computing systems. In this paper, a learning system of hybrid CMOS-memristive convolutional computation for on-chip learning is presented. Two different methods to achieve the convolutional computation on-chip are provided. One method is to utilize a one memristor (1M)-based array to realize both image convolution and recognition. Another method is to perform the convolutional computation on-chip through a hybrid CMOS-memristive learning circuits. In addition, a modified back propagation (BP) algorithm suitable for the proposed memristive neural networks is applied to perform image convolution and recognition. Another highlight of the proposed method is that the presented hybrid CMOS-memristive neural networks can be expanded to deep convolutional neural networks (DNN).",

keywords = "Convolutional neural networks, Crossbar array, Image recognition, Memristor",

author = "Yang Zhang and Menglin Cui and Yang Liu and Linlin Shen",

note = "Publisher Copyright: {\textcopyright} 2019 Elsevier B.V.",

year = "2019",

month = aug,

day = "25",

doi = "10.1016/j.neucom.2019.04.031",

language = "English",

volume = "355",

pages = "48--56",

journal = "Neurocomputing",

issn = "0925-2312",

publisher = "Elsevier B.V.",

}

TY - JOUR

T1 - Hybrid CMOS-Memristive Convolutional computation for on-chip learning

AU - Zhang, Yang

AU - Cui, Menglin

AU - Liu, Yang

AU - Shen, Linlin

PY - 2019/8/25

Y1 - 2019/8/25

N2 - Nanoscale memristive devices have elicited widespread interests in implementing compact and energy-efficient neuromorphic computing systems. In this paper, a learning system of hybrid CMOS-memristive convolutional computation for on-chip learning is presented. Two different methods to achieve the convolutional computation on-chip are provided. One method is to utilize a one memristor (1M)-based array to realize both image convolution and recognition. Another method is to perform the convolutional computation on-chip through a hybrid CMOS-memristive learning circuits. In addition, a modified back propagation (BP) algorithm suitable for the proposed memristive neural networks is applied to perform image convolution and recognition. Another highlight of the proposed method is that the presented hybrid CMOS-memristive neural networks can be expanded to deep convolutional neural networks (DNN).

AB - Nanoscale memristive devices have elicited widespread interests in implementing compact and energy-efficient neuromorphic computing systems. In this paper, a learning system of hybrid CMOS-memristive convolutional computation for on-chip learning is presented. Two different methods to achieve the convolutional computation on-chip are provided. One method is to utilize a one memristor (1M)-based array to realize both image convolution and recognition. Another method is to perform the convolutional computation on-chip through a hybrid CMOS-memristive learning circuits. In addition, a modified back propagation (BP) algorithm suitable for the proposed memristive neural networks is applied to perform image convolution and recognition. Another highlight of the proposed method is that the presented hybrid CMOS-memristive neural networks can be expanded to deep convolutional neural networks (DNN).

KW - Convolutional neural networks

KW - Crossbar array

KW - Image recognition

KW - Memristor

UR - https://www.scopus.com/pages/publications/85065577257

U2 - 10.1016/j.neucom.2019.04.031

DO - 10.1016/j.neucom.2019.04.031

M3 - Article

AN - SCOPUS:85065577257

SN - 0925-2312

VL - 355

SP - 48

EP - 56

JO - Neurocomputing

JF - Neurocomputing

ER -

Hybrid CMOS-Memristive Convolutional computation for on-chip learning

Abstract

UN SDGs

Free Keywords

ASJC Scopus subject areas

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