@inproceedings{225f4fe38cf2482790dc9cd29d187a0c,
title = "AMSNet: Netlist Dataset for AMS Circuits",
abstract = "Today's analog/mixed-signal (AMS) integrated circuit (IC) designs demand substantial manual intervention. The advent of multimodal large language models (MLLMs) has unveiled significant potential across various fields, suggesting their applicability in streamlining large-scale AMS IC design as well. A bottleneck in employing MLLMs for automatic AMS circuit generation is the absence of a comprehensive dataset delineating the schematic-netlist relationship. We therefore design an automatic technique for converting schematics into netlists, and create dataset AMSNet, encompassing transistor-level schematics and corresponding SPICE format netlists. With a growing size, AMSNet can significantly facilitate exploration of MLLM applications in AMS circuit design. We have made the current version of database and associated generation tool public, both of which are expanded quickly.",
keywords = "AMS circuit design, MLLM, circuit topology, front-end design",
author = "Zhuofu Tao and Yichen Shi and Yiru Huo and Rui Ye and Zonghang Li and Li Huang and Chen Wu and Na Bai and Zhiping Yu and Lin, \{Ting Jung\} and Lei He",
note = "Publisher Copyright: {\textcopyright} 2024 IEEE.; 2024 IEEE International LLM-Aided Design Workshop, LAD 2024 ; Conference date: 28-06-2024 Through 29-06-2024",
year = "2024",
doi = "10.1109/LAD62341.2024.10691781",
language = "English",
series = "2024 IEEE LLM Aided Design Workshop, LAD 2024",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2024 IEEE LLM Aided Design Workshop, LAD 2024",
address = "United States",
}